.~.~> With specific layout or layout interconnections {1}
DEFINITION
Classification: 327/564
Integrated structure:
(under subclass 524) Subject matter wherein a plurality of circuit elements or components are formed on or in a single block of semiconductor material.
(1) Note. The following criteria are established to distinguish patents proper for Class 327 from patents proper for Class 257 (Active Solid-State Devices (e.g., Transistors, Solid-State Diodes)): (a) a claimed integrated circuit (IC) chip, per se, is classified in Class 257; (b) a claim to lead frames, per se, is classified in Class 257 since these are only used to connect an IC chip to the external environment; (c) an IC chip claimed in combination with a single lead, a battery, or bias without any configuration is classified in Class 257 since no circuitry external to the chip is claimed; (d) an IC chip claimed in combination with an external circuit suitable for Class 327 will be classified in Class
327 since Class 327 is higher than Class 257 in the overall class hierarchy; (e) circuit interconnections (e.g., point to point, lead interconnections, diode and transistor interconnections, etc.) within the confines of the IC chip itself are classified in Class 257, whereas these same interconnections outside the environment of an IC chip are classified in Class 327; (f) if a specific or broad structure of the IC is claimed with a utility, the patent will be classified in the utility subclass, (e.g., Class 348 (Television), Class 365 (Static Information Storage and Retrieval), etc.); (g) Charge Coupled Devices claimed as part of the circuitry within an IC chip are classified in Class 257.
