US PATENT SUBCLASS 326 / 79
.~.~.~ Integrated Injection Logic (I2L)

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326 /   HD   ELECTRONIC DIGITAL LOGIC CIRCUITRY

62  DF  INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT, ETC.) {3}
63  DF  .~ Logic level shifting (i.e., interface between devices of different logic families) {3}
75  DF  .~.~ Bipolar transistor {4}
79.~.~.~ Integrated Injection Logic (I2L)

DEFINITION

Classification: 326/79

Integrated Injection Logic (I[supscrpt]2[end supscrpt]L):

(under subclass 75) Subject matter including either a complementary bipolar transistor pair merged on the same substrate, incorporating; (a) a vertical, inverse mode npn (conversely pnp) transistor, which can have isolated multicollector regions, and (b) a pnp (conversely npn) lateral transistor which serves as a current injector to inject charge current directly into the vertical, inverse mode transistor base; OR a bipolar or FET transistor pair merged on the same substrate wherein; (a) the base of an inverse mode bipolar transistor is injected with charge current by a FET current injector, or (b) the inverse mode transistor is a FET device (e.g., enhancement-mode junction field-effect transistor (enhancement JFET) with bipolar or FET charge current injection.

SEE OR SEARCH THIS CLASS, SUBCLASS:

100, for integrated injection logic circuits, in general.