US PATENT SUBCLASS 326 / 64
.~.~ Bi-CMOS

Current as of: June, 1999
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326 /   HD   ELECTRONIC DIGITAL LOGIC CIRCUITRY

62  DF  INTERFACE (E.G., CURRENT DRIVE, LEVEL SHIFT, ETC.) {3}
63  DF  .~ Logic level shifting (i.e., interface between devices of different logic families) {3}
64.~.~ Bi-CMOS {3}
65  DF  .~.~.~> TTL to/from CMOS
66  DF  .~.~.~> ECL to/from CMOS
67  DF  .~.~.~> ECL to/from TTL

DEFINITION

Classification: 326/64

Bi-CMOS:

(under subclass 63) Subject matter wherein the interfacing circuit includes a bipolar transistor and a complementary metal-oxide transistor device.

(1) Note. A bipolar transistor is a semiconductor device having at least three electrodes (emitter, base, and collector), two potential barriers, and wherein a controlled current flow comprising both majority and minority carriers (i.e., holes and electrons).

(2) Note. A CMOS or complementary metal-oxide semiconductor device is a device having a p-channel and an n-channel enhancement type metal-oxide field-effect transistor (MOSFET) which are connected in series across a power supply with their gates tied together.

(3) Note. A MOSFET is a field-effect transistor having a metallic gate insulated from the channel by an oxide layer (e.g., SiO2, etc.). A MOSFET is either enhancement-type (normally turned off) or depletion-type (normally turned on).