(under the class definition) Subject matter wherein the logic circuit includes plural input terminals and operates in a manner such that when a digital "on" signal is present at a particular input (known as the inhibit input) to the logic circuit, the logical output from the logic circuit is blocked; and when the inhibit input signal is absent, the logical output from the logic circuit is affected only by signals at the remaining inputs.
SEE OR SEARCH THIS CLASS, SUBCLASS:
104+, for functions of AND, OR, NAND, NOR, or NOT.
