.~ Parasitic prevention in integrated circuit structure
DEFINITION
Classification: 326/15
Parasitic prevention in integrated circuit structure:
(under subclass 9) Subject matter wherein the logic device is part of a monolithic integrated circuit, and is intended to prevent an unwanted interaction between circuit components in the monolithic integrated circuit.
(1) Note. A monolithic integrated circuit is a device in which all components are fabricated on a single chip of
silicon. Interconnections among components are provided by means of metallization patterns on the surface of the chip structure, and the individual parts are not separable from the complete circuit. External connecting wires are taken out to terminal pins or leads.
