US PATENT SUBCLASS 714 / FOR 129
DIGITAL LOGIC TESTING (371/22.1)

Current as of: June, 1999
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714 /   HD   ERROR DETECTION/CORRECTION AND FAULT DETECTION/RECOVERY

FOR 129DIGITAL LOGIC TESTING (371/22.1) {10}
FOR 130  DF  .~> Programmable logic array (PLA) testing (371/22.2)
FOR 131  DF  .~> Scan path testing (e.g., level sensitive scan design (LSSD)) (371/22.31) {5}
FOR 137  DF  .~> Signature analysis (371/22.4)
FOR 138  DF  .~> Built-in testing circuit (BILBO) (371/22.5)
FOR 139  DF  .~> Structural (in-circuit test) (371/22.6)
FOR 140  DF  .~> Device response compared to input pattern (371/24)
FOR 141  DF  .~> Device response compared to expected fault-free response (371/25.1)
FOR 142  DF  .~> Device response compared to fault dictionary/truth table (371/26)
FOR 143  DF  .~> Including test pattern generator (371/27.1) {6}
FOR 150  DF  .~> Determination of marginal operation limits (371/28)

DEFINITION

Classification: 714/FOR.129

DIGITAL LOGIC TESTING:

Foreign art collections including subject matter in which the diagnostic test is performed upon a system or element performing a binary logic operation upon a signal having plural distinct discrete states.