US PATENT SUBCLASS 714 / 50
.~.~.~ State out of sequence


Current as of: June, 1999
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714 /   HD   ERROR DETECTION/CORRECTION AND FAULT DETECTION/RECOVERY

1  DF  RELIABILITY AND AVAILABILITY {4}
48  DF  .~ Error detection or notification {3}
49  DF  .~.~ State error (i.e., content of instruction, data, or message) {3}
50.~.~.~ State out of sequence {2}
51  DF  .~.~.~.~> Control flow state sequence monitored (e.g., watchdog processor for control-flow checking)
52  DF  .~.~.~.~> Error checking code


DEFINITION

Classification: 714/50

State out of sequence:

(under subclass 49) Subject matter wherein an ordering of state information related to a succession of data, instructions etc., is the basis for state analysis.

SEE OR SEARCH CLASS

710, Electrical Computers and Digital Processing Systems-Input/Output,

260+, for Input/Output device interrupt processing.

711, Electrical Computers and Digital Processing Systems: Memory,

204, for virtual address branch or jump address predicting; and subclass 213 for generalized prefetch, look-ahead, jump, or predictive address generating.

712, Electrical Computers and Digital Processing Systems-Processing Architecture and Instruction Processing (e.g., Processors), appropriate subclasses for instruction fetching and prefetching and for branching instruction processing and for task management and control, per se.