US PATENT SUBCLASS 714 / 34
.~.~.~ Halt, clock, or interrupt signal (e.g., freezing, hardware breakpoint, single-stepping)

Current as of: June, 1999
Click HD for Main Headings
Click for All Classes

Internet Version by PATENTEC © 1999      Terms of Use


714 /   HD   ERROR DETECTION/CORRECTION AND FAULT DETECTION/RECOVERY

1  DF  RELIABILITY AND AVAILABILITY {4}
25  DF  .~ Fault locating (i.e., diagnosis or testing) {7}
32  DF  .~.~ Particular stimulus creation {4}
34.~.~.~ Halt, clock, or interrupt signal (e.g., freezing, hardware breakpoint, single-stepping)

DEFINITION

Classification: 714/34

Halt, clock, or interrupt signal (e.g., freezing, hardware breakpoint, single-stepping):

(under subclass 32) Subject matter further including means or steps for controlling a processor or digital data processing system to be tested or diagnosed by applying an interrupt, halt, or clock signal to a processor or digital data processing system.

SEE OR SEARCH CLASS

395, Information Processing System Organization,

701+, for software development tools,

710, Electrical Computers and Digital Processing Systems-Input/Output,

48+, for Input/Output device interrupt processing.

711, Electrical Computers and Digital Processing Systems: Memory,

204, for virtual address branch or jump address predicting; and subclasses 213 for generalized prefetch, look-ahead, jump, or predictive address generating. 712, Electrical Computers and Digital Processing Systems Processing Architecture and Instruction Processing (e.g., Processors),

227, for instruction processing in support of testing, debugging, emulation, etc.

713, Electrical Computers and Digital Processing Systems-Support,

500+, for clock processing, per se.