US PATENT SUBCLASS 395 / 500.06
.~.~ Design verification (e.g., wiring line capacitance, fan-out checking, minimum path width)

Current as of: June, 1999
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395 /   HD   INFORMATION PROCESSING SYSTEM ORGANIZATION

500.02  DF  CIRCUIT DESIGN {8}
500.05  DF  .~ Testing or evaluating {1}
500.06.~.~ Design verification (e.g., wiring line capacitance, fan-out checking, minimum path width) {1}
500.07  DF  .~.~.~> Timing analysis (e.g., delay time, path delay, latch timing)

DEFINITION

Classification: 395/500.06

Design verification (e.g., wiring line capacitance, fan-out checking, minimum path width):

(under subclass 500.05) Subject matter comprising means or steps for checking and confirming the circuit components layout for consistency of the functional and logical

correctness.

SEE OR SEARCH THIS CLASS, SUBCLASS:

500.35, 500.36, for circuit and logic simulation, respectively.