US PATENT SUBCLASS 365 / 230.08
.~ Including particular address buffer or latch circuit arrangement

Current as of: June, 1999
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365 /   HD   STATIC INFORMATION STORAGE AND RETRIEVAL

230.01  DF  ADDRESSING {16}
230.08.~ Including particular address buffer or latch circuit arrangement

DEFINITION

Classification: 365/230.08

Including particular address buffer or latch circuit arrangement:

(under subclass 230.01) Subject matter including a detail of a temporary storage device for an address and selection signal.

SEE OR SEARCH THIS CLASS, SUBCLASS:

189.05, for a feature of a data buffer or latch, which may be combined with an address buffer or latch.