US PATENT SUBCLASS 710 / 52
.~ Input/Output data buffering

Current as of: June, 1999
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710 /   HD   ELECTRICAL COMPUTERS AND DIGITAL DATA PROCESSING SYSTEMS: INPUT/OUTPUT

1  DF  INPUT/OUTPUT DATA PROCESSING {16}
52.~ Input/Output data buffering {5}
53  DF  .~.~> Alternately filling or emptying buffers
54  DF  .~.~> Queue content modification
55  DF  .~.~> Contents validation
56  DF  .~.~> Buffer space allocation or deallocation
57  DF  .~.~> Fullness indication

DEFINITION

Classification: 710/52

Input/Output data buffering:

(under subclass 1) Subject matter further comprising means or steps for temporarily storing data being transferred between the peripheral, and digital data processing systems or computer.

SEE OR SEARCH CLASS

326, Electronic Digital Logic Circuitry,

56+, for employing tri-state buffers.

365, Static Information Storage and Retrieval,

189.05, for buffering or latching data being read from or written to memories, and subclass 230.08 for buffering or latching address data being employed to access memories.

709, Electrical Computers and Digital Data Processing Systems: Multiple Computer and Process Coordinating,

234, for computer-to - computer data transferring which may include controlling buffer registers.

711, Electrical Computers and Digital Processing Systems: Memory,

118+, for caching under storage accessing and control.