US PATENT SUBCLASS 710 / 260
INTERRUPT PROCESSING

Current as of: June, 1999
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710 /   HD   ELECTRICAL COMPUTERS AND DIGITAL DATA PROCESSING SYSTEMS: INPUT/OUTPUT

260INTERRUPT PROCESSING {8}
261  DF  .~> Multimode interrupt processing
262  DF  .~> Interrupt inhibiting or masking
263  DF  .~> Interrupt queuing
264  DF  .~> Interrupt prioritizing {1}
266  DF  .~> Programmable interrupt processing
267  DF  .~> Processor status
268  DF  .~> Source or destination identifier
269  DF  .~> Handling vector

DEFINITION

Classification: 710/260

INTERRUPT PROCESSING:

(under the class definition) Subject matter comprising means or steps for stopping, halting, or suspending a current processing function within a computer or digital data processing system.

SEE OR SEARCH THIS CLASS, SUBCLASS:

48+, for Input/Output device interrupt data processing.

SEE OR SEARCH CLASS

709, Electrical Computers and Digital Data Processing Systems: Multiple Computer and Process Coordinating,

1+, for data processing task management.

711, Electrical Computers and Digital Processing Systems: Memory,

204+, for virtual address branch or jump address predicting and subclass 213 for generalized prefetch, look-ahead, jump, or predictive address generating. 712, Electrical Computers and Digital Data Processing Systems: Processing Architectures and Instruction Processing (e.g. processors), appropriate subclasses for instruction data processing, per se.

713, Electrical Computers and Digital Data Processing Systems: Support, appropriate subclasses for processes and apparatus used for the synchronizing the clocking or timing operations of a processor.

714, Error Detection/Correction and Fault Detection/Recovery,

34, for controlling a processor to be tested or diagnosed by applying an interrupt, halt, or clock signal to the processor and subclass 50 wherein an ordering of state information related to a succession of data, instructions etc., is the basis for state analysis.