US PATENT SUBCLASS 395 / 500.03
.~ Optimization (e.g., redundancy, compaction)

Current as of: June, 1999
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395 /   HD   INFORMATION PROCESSING SYSTEM ORGANIZATION

500.02  DF  CIRCUIT DESIGN {8}
500.03.~ Optimization (e.g., redundancy, compaction)

DEFINITION

Classification: 395/500.03

Optimization (e.g., redundancy, compaction):

(under subclass 500.02) Subject matter comprising means or steps for improving the layout of the designed circuit components as far as possible.

(1) Note. Examples of the circuit design improvements are global redundancy or compaction of the designed circuit layout such that preserving the integrity of the original circuit design in compliance with design rule requirements.

SEE OR SEARCH THIS CLASS, SUBCLASS:

500.09, 500.1, 500.11, 500.12, for improving the floorplanning of the layout area of a circuit design.

SEE OR SEARCH CLASS

326, Electronic Digital Logic Circuitry,

10, for the redundancy of circuit components or devices.